A flash memory, which is a popular type of non-volatile memory, is a memory device that data may be electrically deleted from or written to. Flash memory not only consumes less power than storage media based on a magnetic disc memory but also has a shorter access time, similar to hard discs.
The flash memory may be categorized into a NOR type flash memory or a NAND type flash memory according to a connecting state between cells and bit lines. The NOR type flash memory has a structure in which two or more cell transistors may be connected in parallel to each bit line, and data may be stored therein using the channel hot electron method and data may be deleted therefrom using the Fowler-Nordheim (F-N) tunneling method. The NAND type flash memory has a structure in which two or more cell transistors may be connected in series to each bit line, and data may be stored therein or data may be deleted therefrom using the F-N tunneling method. In general, the NOR type flash memory uses a large amount of current and may not be easy to highly integrate but may operate at high speeds. In contrast, the NAND type flash memory may be easier to highly integrate since it uses less cell current than the NOR type flash memory.
FIG. 1 is a circuit diagram of a memory cell included in a conventional NAND type flash memory. FIG. 1 illustrates a plurality of word lines WL11 through WL14 and a plurality of memory cells M1 through M14. The memory cells M11 through M14 may form a string structure together with selection transistors ST1 and ST2, and may be connected in series between a bit line BL and a ground voltage source VSS. Since the NAND type flash memory may use a small amount of cell current, all memory cells connected to a word line may be programmed by performing a single programming operation.
FIG. 2 is a circuit diagram of a memory cell included in a conventional NOR type flash memory. Referring to FIG. 2, in the case of the NOR type flash memory, memory cells M21 through M26 may be connected between a bit line BL1 or BL2 and a common source line CSL. Since the NOR type flash memory may use a large amount of current to perform a programming operation, memory cells selected in units of bits may be programmed during a single programming operation.
In general, to program data in a memory cell array of a NOR type flash memory, a program command may be input to the flash memory, and then, a program address and data may be input to the flash memory. The input program address and data may be temporarily stored in a memory chip, and a memory cell corresponding to the program address may be selected. Next, a program voltage corresponding to the data may be applied to memory cells selected using a bit line, thereby programming the memory cells with the data.
Next, when a program execution timing that has been internally set has lapsed, a verification operation may be performed in order to determine whether data is normally or correctly programmed in a selected memory cell. The programming operation and the verification operation may be repeatedly performed until data is correctly programmed in a selected memory cell.
In the channel hot electron method used to program the NOR type flash memory, a programming current equal to or greater than a predetermined level may be required since a high voltage from 4 to 6 V may be applied to a drain of a memory cell. Thus, during programming of the NOR type flash memory, the total number of memory cells that may be programmed at a time may be limited to the range from 2 to 4. For example, if the total number of bits that may be programmed at a time is 4, 16-bit data may be divided into four pieces of 4-bit data, and programmed in a memory cell a total of four times.
FIGS. 3A and 3B illustrate a data scanning section and a data sensing section of a conventional flash memory. In particular, FIG. 3A illustrates a scanning section of program data received from an input/output (I/O) buffer (not shown) during programming of a flash memory device, and FIG. 3B illustrates a data sensing section during a verification operation for determining whether data bits may be correctly programmed in a memory cell.
In a conventional buffer programming method applied to flash memory devices, a scanning operation may be performed on data received from an I/O buffer in units of scanning, e.g., in units of n words (n is an integer). For example, erasing may be performed on memory cells before programming them so as to detect data of “0” from among the received data when data stored in the memory cells is “1”.
Next, the data of “0” may be actually programmed in the memory cells. In this case, since all the pieces of the data in the units of scanning may be “1”, scanning may be performed on the data even if there is no data to be programmed, and the programming may be discontinued after obtaining information that no data is detected.
As illustrated in FIG. 3A, if data that is a first unit of scanning is provided, scanning may be performed on the data in order to detect data of “0” from among the data. If data of “0” is detected as the result of scanning, the detected data may be programmed in the memory cell.
Next, if data that is a second unit of scanning is provided, scanning may be performed on the data. If data that is to be actually programmed is not detected as the result of scanning, data corresponding to the second unit of scanning may be not programmed in the memory cell. That is, even if data that is to be actually programmed is not included in the unit of scanning, scanning may be unnecessarily performed on the data in order to detect data of “0” from among the data, thereby increasing a time for data programming.
Also, if programming of data stored in the I/O buffer is completed, the verification operation may be performed in order to determine whether the data has been normally or correctly programmed in the memory cell. To this end, sensing may be performed on the data stored in the memory cell. As illustrated in FIG. 3B, even if no cells are programmed since data in units of scanning is not “0”, sensing may be unnecessarily performed for the corresponding cell region in the memory cell. Also, even if reprogramming is not needed since verification of a programmed memory cell is passed, scanning may be unnecessarily performed during reprogramming.